FGPA Design & Verification Engineer

Posted 30 April 2024
Salary £500 - £600 per day
LocationCambridgeshire
Job type Contract
Discipline Software Engineering
Reference105161
Contact NameKatie Southward

Job description

FGPA Engineer - Design & Verification

Hybrid - 2 days onsite per week

£500 - £600 per day inside IR35

6 months

My client is looking for an experienced FPGA Design & Verification Engineer to join their skilled projects team working on embedded IP and system design.

You'll be responsible for translating FPGA architecture specifications into RTL designs, backed by robust verification environments to uphold fidelity to specifications.

Integrating your designs into SoC and reference designs, followed by rigorous system-level testing before deployment to our prototyping teams.

Skills required:

  • Recent hands-on experience with RTL design using (System-)Verilog, coupled with a solid grasp of FPGA device architecture.
  • Proficiency in RTL Verification, encompassing both unit and system levels, leveraging SystemVerilog with a knack for crafting System Verilog Assertions (SVA) checks and coverage metrics.
  • Command over UNIX/Linux environments and scripting languages like Python, Tcl, Make, and bash, essential for thriving in our collaborative development ecosystem.
  • Previous encounters with ASIC or FPGA synthesis tools, along with familiarity with data formats such as YAML and JSON, are definite pluses.
  • A penchant for structured problem-solving coupled with a creative flair.